Broadly, a multiprocessor computer, or multiprocessor for short, is a computer system comprising a plurality of processors that cooperate in the performance of system tasks. Conventional multiprocessor architectures are of two types: synchronous and asynchronous. Generally, "synchronous" refers to a device whose speed of operation is related to the rest of the system to which the device is connected. As used in the art and herein, "synchronous" computer refers to a computer in which each event, or the performance of each operation, that is of interest starts as a result of a signal generated by a clock. Conversely, "asynchronous" refers to a device or a computer that is not synchronous.
In an asynchronous multiprocessor, the individual processors operate under their own timing and at their own rate. Consequently, processors of different types or having different performance characteristics may be used in such a system. The time of completion by an individual processor of its portion of the system task is uncertain; hence, the processors use inter-processor messages or interrupts to notify system control of their task-portion completion and readiness to undertake another task portion. The system control may be centralized, e. g., a host processor, or decentralized and distributed among the individual processors. In either case, however, the system control typically must be an intelligent entity, capable of awaiting message or interrupt arrival, of responding to arrival of different messages or interrupts in different order and at different times, and of controlling system activity accordingly. This means that the system control typically must be rather complex, and hence expensive. Furthermore, the generation and transmission of, and awaiting of responses to, messages and interrupts by processors is wasteful of time, i.e., constitutes overhead, and adversely affects system performance. Examples of asynchronous systems are processor arrangements in distributed computer systems and area networks of computers.
In a synchronous multiprocessor, the individual processors operate either under common central timing, or their individual timing mechanisms are synchronized with each other. The time of completion by an individual processor of its portion of the system task is deterministic and knowable in advance; hence, the use of messages and interrupts is not required to notify system control of when individual processors become available. In fact, no notification is needed, and system control may be reduced to a simple input and output gating function, driven by the same timing mechanism as drives the processors. This eliminates much of the complexity and expense of system control mechanisms and the overhead associated with control communication mechanisms of asynchronous systems. These advantages have in the past had a price, however: to enable operating a plurality of processors synchronously, the prior art has relied on either using identical processors--ones having identical performance characteristics--or on operating a plurality of non-identical processors at the performance, e.g., speed, of the lowest-performance one of the processors. This need to use matching processors, or to at least equalize their individual performances, has typically resulted in high system cost, and has bred inefficiencies of its own. Examples of synchronous systems are array processors and super-computers such as the Cray computer.